HD64F3048F16 Datasheet, PDF (104/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 3 MCU Operating Modes
3.4.4 Mode 4
Ports 1, 2, and 5 and part of port A function as address pins A₂₃ to A₀, permitting access to a
maximum 16-Mbyte address space. The initial bus mode after a reset is 16 bits, with 16-bit access
to all areas. If all areas are designated for 8-bit access in ABWCR, the bus mode switches to 8 bits.
A₂₃ to A₂₁ are valid when 0 is written in bits 7 to 5 of BRCR. (In this mode A₂₀ is always used for
address output.)
3.4.5 Mode 5
Ports 1, 2, and 5 can function as address pins A₁₉ to A₀, permitting access to a maximum 1-Mbyte
address space, but following a reset they are input ports. To use ports 1, 2, and 5 as an address bus,
the corresponding bits in their data direction registers (P1DDR, P2DDR, and P5DDR) must be set
to 1. The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is
designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.6 Mode 6
Ports 1, 2, and 5 and part of port A function as address pins A₂₃ to A₀, permitting access to a
maximum 16-Mbyte address space, but following a reset they are input ports. To use ports 1, 2,
and 5 as an address bus, the corresponding bits in their data direction registers (P1DDR, P2DDR,
and P5DDR) must be set to 1. For A₂₃ to A₂₁ output, clear bits 7 to 5 of BRCR to 0. (In this mode
A₂₀ is always used for address output.)
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. If at least one area is
designated for 16-bit access in ABWCR, the bus mode switches to 16 bits.
3.4.7 Mode 7
This mode operates using the on-chip ROM, RAM, and internal I/O registers. All I/O ports are
available. Mode 7 supports a 1-Mbyte address space.
Rev. 3.00 Sep 27, 2006 page 76 of 872
REJ09B0325-0300