HD64F3048F16 Datasheet, PDF (115/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 4 Exception Handling
φ
RES
Internal
address bus
Internal
read signal
Internal
write signal
Internal
data bus
(16 bits wide)
Vector fetch
Prefetch of
Internal
first program
processing instruction
(1)
(3)
(5)
(2)
(4)
(6)
(1), (3) Address of reset vector ((1) = H'000000, (2) = H'000002)
(2), (4) Start address (contents of reset vector)
(5) Start address
(6) First instruction of program
Figure 4.4 Reset Sequence (Modes 5, 6, and 7)
4.2.3 Interrupts after Reset
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, PC and CCR
will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. The first instruction of the program is
always executed immediately after the reset state ends. This instruction should initialize the stack
pointer (example: MOV.L #xx:32, SP).
Rev. 3.00 Sep 27, 2006 page 87 of 872
REJ09B0325-0300