HD64F3048F16 Datasheet, PDF (638/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
Table 18.11 Hardware Protection
Functions
Item
Description
Program Erase Verify
FWE pin
protection
Reset/
standby
protection
• When a low level is input to the FWE pin,
FLMCR1, and EBR are initialized, and the
program/erase-protected state is entered.
• In a reset (including a WDT overflow reset) and
in standby mode, FLMCR1, FLMCR2, and EBR
are initialized, and the program/erase-protected
state is entered.
No^*1
No
No^*3 No
No^*3 No
Error
protection
• In a reset via the RES pin, the reset state is not
entered unless the RES pin is held low until
oscillation stabilizes after powering on. In the
case of a reset during operation, hold the RES
pin low for the RES pulse width specified in the
AC Characteristics section^*4.
• When a microcomputer operation error (error
No
generation (FLER = 1)) was detected while flash
memory was being programmed/erased, error
protection is enabled. At this time, the FLMCR1
and EBR settings are held, but programming/
erasing is aborted at the time the error was
generated. Error protection is released only by a
reset via the RES pin or a WDT reset, or in the
hardware standby mode.
No^*3 Yes^*2
Notes: 1. Excluding a RAM area overlapping flash memory.
2. It is possible to perform a program-verify operation on the 128 bytes being
programmed, or an erase-verify operation on the block being erased.
3. All blocks are unerasable and block-by-block specification is not possible.
4. See section 4.2.2, Reset Sequence, and section 18.11, Notes on Flash Memory
Programming/Erasing. The H8/3048F-ONE requires at least 20 system clocks for a
reset period during operation.
Rev. 3.00 Sep 27, 2006 page 610 of 872
REJ09B0325-0300