HD64F3048F16 Datasheet, PDF (658/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 19 Clock Pulse Generator
19.1.1 Block Diagram
Figure 19.1 shows a block diagram of the clock pulse generator.
XTAL
EXTAL
Oscillator
Duty
adjustment
circuit
Frequency
divider
Division
control
register
CPG
Prescalers
Data bus
φ φ/2 to φ/4096
Figure 19.1 Block Diagram of Clock Pulse Generator
19.2 Oscillator Circuit
Clock pulses can be supplied by connecting a crystal resonator, or by input of an external clock
signal.
19.2.1 Connecting a Crystal Resonator
Circuit Configuration
A crystal resonator can be connected as in the example in figure 19.2. The damping resistance Rd
should be selected according to table 19.1, and external capacitance C_L1 or C_L2 to table 19.2. An
AT-cut parallel-resonance crystal should be used.
Rev. 3.00 Sep 27, 2006 page 630 of 872
REJ09B0325-0300