HD64F3048F16 Datasheet, PDF (669/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 20 Power-Down State
20.2 Register Configuration
The H8/3048B Group has a system control register (SYSCR) that controls the power-down state,
and a module standby control register (MSTCR) that controls the module standby function. Table
20.2 summarizes these registers.
Table 20.2 Control Register
Address^* Name
H'FFF2
System control register
H'FF5E
Module standby control register
Note: * Lower 16 bits of the address.
Abbreviation R/W
SYSCR
R/W
MSTCR
R/W
Initial Value
H'0B
H'40
20.2.1 System Control Register (SYSCR)
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
2
UE NMIEG
1
0
R/W R/W
1
0
 RAME
1
1

R/W
RAM enable
Reserved bit
NMI edge select
User bit enable
Standby timer select 2 to 0
These bits select the
waiting time at exit from
software standby mode
Software standby
Enables transition to
software standby mode
SYSCR is an 8-bit readable/writable register. Bit 7 (SSBY) and bits 6 to 4 (STS2 to STS0) control
the power-down state. For information on the other SYSCR bits, see section 3.3, System Control
Register (SYSCR).
Rev. 3.00 Sep 27, 2006 page 641 of 872
REJ09B0325-0300