HD64F3048F16 Datasheet, PDF (360/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 16-Bit Integrated Timer Unit (ITU)
Bit 1—Counter Start 1 (STR1): Starts and stops timer counter 1 (TCNT1).
Bit 1: STR1
0
1
Description
TCNT1 is halted
TCNT1 is counting
Bit 0—Counter Start 0 (STR0): Starts and stops timer counter 0 (TCNT0).
Bit 0: STR0
0
1
Description
TCNT0 is halted
TCNT0 is counting
(Initial value)
(Initial value)
10.2.2 Timer Synchro Register (TSNC)
TSNC is an 8-bit readable/writable register that selects whether channels 0 to 4 operate
independently or synchronously. Channels are synchronized by setting the corresponding bits to 1.
Bit
7
6
5
4
3
2
1
0


 SYNC4 SYNC3 SYNC2 SYNC1 SYNC0
Initial value
1
1
1
0
0
0
0
0
Read/Write



R/W
R/W
R/W
R/W R/W
Reserved bits
Timer sync 4 to 0
These bits synchronize
channels 4 to 0
TSNC is initialized to H'E0 by a reset and in standby mode.
Bits 7 to 5—Reserved: Read-only bits, always read as 1.
Bit 4—Timer Sync 4 (SYNC4): Selects whether channel 4 operates independently or
synchronously.
Bit 4: SYNC4
0
1
Description
Channel 4’s timer counter (TCNT4) operates independently
TCNT4 is preset and cleared independently of other channels
Channel 4 operates synchronously
TCNT4 can be synchronously preset and cleared
(Initial value)
Rev. 3.00 Sep 27, 2006 page 332 of 872
REJ09B0325-0300