HD64F3048F16 Datasheet, PDF (626/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
• Do not input low level to the FWE pin while the boot program is executing and when
programming/erasing flash memory*³.
7. If the mode pins (MD₂ to MD₀), FWE pin, and RXD1 pin input levels are changed (e.g., from
low level to high level) during a reset (while a low level is being input to the RES pin), since
the microcomputer’s operating mode will change and the state of the address dual port and bus
control output signals (CSn, RD, HWR, LWR) changes, use of these pins as output signals
during reset must be disabled outside the microcomputer.
H8/3048F-ONE
CSn
MD2
MD1
MD0
FWE
RES
System
control
unit
External
memory,
etc.
Figure 18.10 Recommended System Block Diagram
Notes: 1. The mode pin, FWE pin, and RXD1 pin input must satisfy the mode programming
setup time (t_MDS) relative to the reset clear timing.
2. See section 4.2.2, Reset Sequence and 18.11, Notes on Flash Memory
Programming/Erasing. The H8/3048F-ONE requires a minimum of 20 system clocks.
3. For notes on FWE pin High/Low, see section 18.11, Notes on Flash Memory
Programming/Erasing.
18.6.2 User Program Mode
When set to the user program mode, user’s programming/erasing control program can erase and
program the flash memory. Therefore, on-chip flash memory on-board programming can be
performed by providing a means of controlling FWE and supplying the write data on the board
and providing a programming/erasing program in a part of the program area.
To select this mode, activate H8/3048F-ONE to on-chip flash memory enable modes 5, 6, and 7
and apply a high level to the FWE pin. In this state, the peripheral functions, other than flash
memory, are performed the same as in modes 5, 6, and 7.
Rev. 3.00 Sep 27, 2006 page 598 of 872
REJ09B0325-0300