HD64F3048F16 Datasheet, PDF (574/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 15 A/D Converter
15.2.2 A/D Control/Status Register (ADCSR)
Bit
Initial value
Read/Write
7
ADF
0
R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
0
CH0
0
R/W
Channel select 2 to 0
These bits select analog
input channels
Clock select
Selects the A/D conversion time
Scan mode
Selects single mode or scan mode
A/D start
Starts or stops A/D conversion
A/D interrupt enable
Enables and disables A/D end interrupts
A/D end flag
Indicates end of A/D conversion
Note: * Only 0 can be written, to clear the flag.
ADCSR is an 8-bit readable/writable register that selects the mode and controls the A/D converter.
ADCSR is initialized to H'00 by a reset and in standby mode.
Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion.
Bit 7: ADF
0
1
Description
[Clearing condition]
Cleared by reading ADF while ADF = 1, then writing 0 in ADF
[Setting conditions]
Single mode: A/D conversion ends
Scan mode: A/D conversion ends in all selected channels
(Initial value)
Rev. 3.00 Sep 27, 2006 page 546 of 872
REJ09B0325-0300