HD64F3048F16 Datasheet, PDF (835/903 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

RTMCSR—Refresh Timer Control/Status Register
Appendix B Internal I/O Register
H'AD Refresh controller
Bit
7
6
5
4
3
2
1
0
CMF CMIE CKS2 CKS1 CKS0



Initial value
0
0
0
0
0
1
1
1
Read/Write R/(W)* R/W R/W R/W R/W



Clock select 2 to 0
Bit 5 Bit 4 Bit 3
CKS2 CKS1 CKS0 Counter Clock Source
0
0
0 Clock input is disabled
1 φ/2
1
0 φ/8
1 φ/32
1
0
0 φ/128
1 φ/512
1
0 φ/2048
1 φ/4096
Compare match interrupt enable
0 The CMI interrupt requested by CMF is disabled
1 The CMI interrupt requested by CMF is enabled
Compare match flag
0 [Clearing condition]
Read CMF when CMF = 1, then write 0 in CMF
1 [Setting condition]
RTCNT = RTCOR
Note: * Only 0 can be written, to clear the flag.
Rev. 3.00 Sep 27, 2006 page 807 of 872
REJ09B0325-0300