SA1110 Datasheet, PDF (83/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

System Control Module
Bit Position
IP 11
IP 10
IP 9
IP 8
IP 7
IP 6
IP 5
IP 4
IP 3
IP 2
IP 1
IP 0
Unit
System
Source Module
General-purpose I/O
Total level 2 interrupt
sources
# of Level 2 Sources
Bit Field Description
17
“OR” of GPIO edge detects 27-11.
1
GPIO 10 edge detect.
1
GPIO 9 edge detect.
1
GPIO 8 edge detect.
1
GPIO 7 edge detect.
1
GPIO 6 edge detect.
1
GPIO 5 edge detect.
1
GPIO 4 edge detect.
1
GPIO 3 edge detect.
1
GPIO 2 edge detect.
1
GPIO 1 edge detect.
1
GPIO 0 edge detect.
110
Several units have more than one source per interrupt signal. When an interrupt is signalled from
one of these units, the interrupt handler routine identifies which interrupt was signalled using the
interrupt controller’s flag register (this identifies the unit that made the request, but not the exact
source). The handler then reads the interrupting unit’s status register to identify which source
within the unit signalled the interrupt. For all interrupts that have one corresponding source, the
interrupt handler routine needs to use only the interrupt controller’s registers to identify the exact
cause of the interrupt.
SA-1110 Developer’s Manual
9-13