SA1110 Datasheet, PDF (111/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

System Control Module
9.5.7.8
Power Manager Oscillator Status Register (POSR)
The power manager oscillator status register (POSR) is a single-bit, read-only register that contains
a status bit indicating whether the 32.768-kHz oscillator is up to speed after a hardware reset. This
bit is set after the expiration of a timer that is clocked by a ring oscillator. This bit will be set within
2–10 seconds after the negation of nRESET.
0h 9002 001C
POSR
Read-Only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits
0
31..1
Name
OOK
—
Description
Oscillator OK.
This bit is cleared on a hardware reset and set after the 32.768-kHz oscillator has
stabilized. This bit is read only.
Reserved
9.5.8
.
Table 9-4.
Power Manager Register Locations
Table 9-4 shows the registers associated with the power manager and the physical addresses used
to access them
Power Manager Register Locations
Address
0h 9002 0000
0h 9002 0004
0h 9002 0008
0h 9002 000C
0h 9002 0010
0h 9002 0014
0h 9002 0018
0h 9002 001C
Name
PMCR
PSSR
PSPR
PWER
PCFR
PPCR
PGSR
POSR
Description
Power manager control register
Power manager sleep status register
Power manager scratch pad register
Power manager wake-up enable register
Power manager general configuration register
Power manager PLL configuration register
Power manager GPIO sleep state register
Power manager oscillator status register
SA-1110 Developer’s Manual
9-41