SA1110 Datasheet, PDF (288/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
11.10.12 UART Register Locations
Table 11-16 shows the registers associated with the UART block and the physical addresses used to
access them.
Table 11-16. UART Control, Data, and Status Register Locations
Address
0h 8003 0000
0h 8003 0004
0h 8003 0008
0h 8003 000C
0h 8003 0010
0h 8003 0014
0h 8003 0018
0h 8003 001C
0h 8003 0020
0h 8003 0024 –
0h 8003 005C
Name
UTCR0
UTCR1
UTCR2
UTCR3
UTCR4
UTDR
—
UTSR0
UTSR1
—
Description
UART Control Register 0
UART Control Register 1
UART Control Register 2
UART Control Register 3
UART Control Register 4
UART Data Register
Reserved
UART Status Register 0
UART Status Register 1
Reserved
11.10.13 HSSP Register Locations
Table 11-17 shows the registers associated with the HSSP block and the physical addresses used to
access them.
Table 11-17. HSSP Control, Data, and Status Register Locations
Address
Name
Description
0h 8004 0060
HSCR0
HSSP Control Register 0
0h 8004 0064
HSCR1
HSSP Control Register 1
0h 8004 0068
—
Reserved
0h 8004 006C
HSDR
HSSP Data Register
0h 8004 0070
—
Reserved
0h 8004 0074
HSSR0
HSSP Status Register 0
0h 8004 0078
HSSR1
HSSP Status Register 1
0h 8004 007C - 0h 8004 FFFF —
Reserved
Note: HSCR2 resides within the same address space as the PPC.
0h 9006 0028
HSCR2
HSSP Control Register 2
11-108
SA-1110 Developer’s Manual