SA1110 Datasheet, PDF (263/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
0h 8002 0070
7
6
5
Reset
?
?
?
GPCLKR3
4
3
BRD 7..0
?
?
Read/Write
2
1
0
?
?
?
Bits
Name
Description
Baud rate divisor.
7..0
BRD 7..0 Encoded value (from 0 to 4095). Used to generate the baud rate of the GPCLK.
Baud Rate = 3.6864x10⁶/((BRD+1)), where BRD is a decimal value.
11.9.5 UART Register Locations
Table 11-14 shows the registers associated with the UART and the physical addresses used to
access them. See the Section 11.9, “Serial Port 1 – GPCLK/UART” on page 11-78 for a description
of the programming and operation of the UART (serial port 1’s UART is identical to serial port 3’s
UART).
Table 11-14. UART Control, Data, and Status Register Locations
Address
0h 8001 0000
0h 8001 0004
0h 8001 0008
0h 8001 000C
0h 8001 0010
0h 8001 0014
0h 8001 0018
0h 8001 001C
0h 8001 0020
0h 8001 0024 –
0h 8001 005C
Name
UTCR0
UTCR1
UTCR2
UTCR3
—
UTDR
—
UTSR0
UTSR1
—
Description
UART control register 0
UART control register 1
UART control register 2
UART control register 3
Reserved
UART data register
Reserved
UART status register 0
UART status register 1
Reserved
SA-1110 Developer’s Manual
11-83