SA1110 Datasheet, PDF (67/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Clocks
8
This section describes the Intel^® StrongARM^* SA-1110 Microprocessor (SA-1110) clocks. The
following diagram shows the distribution of clocks in the SA-1110. The 3.6864-MHz oscillator
feeds both PLLs. The primary PLL provides clocks for the core logic and a 7.36-MHz clock for
several of the serial controllers. The core, Dcaches, and read and write buffers use either the
full-speed core clock or the divided-down clock. The LCD controller, DMA, memory controller,
and GPIO use the core clock divided by 2 (RCLK). The 32.768-kHz oscillator feeds the real-time
clock (RTC) and the power manager logic. The secondary PLL provides the clock for the UDC, the
ICP, and the MCP. The oscillators and PLLs are completely integrated with the SA-1110 and
require no external devices other than the crystals for operation.The following figure shows a block
diagram of the clocking system for the SA-1110.
Figure 8-1. SA-1110 Clock System Block Diagram
32.768 kHz
Oscillator
3.6864 MHz
Oscillator
Primary PLL
59 MHz - 200 MHz
Secondary PLL
48 MHz
RTC and Power
Manager
Divide
by 2
Intel^® ARM*
SA-1 Core
I-Cache
D-Cache
Write Buffer
Read Buffer
GPIO 27
Peripherals
UART: 7.36 MHz
ICP: 7.36 or 48 MHz
MCP/SSP: 7.36 or 12 MHz
PPC: 7.36 MHz
UDC: 48 MHz
LCD
Controller
DMA
Controller
Memory
Controller
I/O
Controller
A8054-01
* Other brands and names are the property of their respective owners.
SA-1110 Developer’s Manual
8-1