SA1110 Datasheet, PDF (261/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
11.9.3 GPCLK Control Register 1
GPCLK Control Register 1 (GPCLKR1) contains one bit field that controls the general purpose
clock.
11.9.3.1
Transmit Enable (TXE)
The Transmit Enable bit enables and disables the GPCLK. When TXE=0, the GPCLK transmitter
logic is disabled. The clocks are turned off to save power.
When TXE=1, the GPCLK transmitter logic is enabled
Note: You must first program all other control bits before setting the TXE bit.
The following table shows the location of the TXE bit within GPCLK Control Register 1. The TXE
bit is reset to a known state to ensure the GPCLK is disabled following a reset of the SA-1110. All
other bits shown in the table are reserved for future use.
0h 8002 0064
7
6
Reset
–
–
GPCLKR1
5
4
3
Reserved
–
–
–
Read/Write
2
1
0
TXE
Reserved
–
0
–
Bits
1
7.. 2 and 0
Name
TXE
—
Description
Transmit Enable
0 – GPCLK Transmit Logic disabled. Control of he TXD1 pin is given to the PPC unit if
SUS=0
1– GPCLK Transmit Logic enabled if SUS=0.
Reserved.
SA-1110 Developer’s Manual
11-81