SA1110 Datasheet, PDF (14/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

11.13.5.2 SSP Pin Reassignment (SPR) .......................................................... 11–172
11.13.6 PPC Sleep Mode Pin Direction Register ................................................. 11–173
11.13.7 PPC Pin Flag Register............................................................................. 11–175
11.13.8 PPC Register Locations .......................................................................... 11–177
12
DC Parameters ........................................................................................................... 12–1
12.1 Absolute Maximum Ratings ............................................................................ 12–1
12.2 DC Operating Conditions ................................................................................ 12–2
12.3 Power Supply Voltages and Currents ............................................................. 12–3
13
AC Parameters ........................................................................................................... 13–1
13.1 Test Conditions ............................................................................................... 13–1
13.2 Model Considerations ..................................................................................... 13–2
13.3 Memory Bus and PCMCIA Signal Timings ..................................................... 13–2
13.4 LCD Controller Signals.................................................................................... 13–3
13.5 MCP Signals ................................................................................................... 13–3
13.6 Timing Parameters.......................................................................................... 13–4
13.6.1 Asynchronous Signal Timing Descriptions .................................................. 13–6
14
Package and Pinout ................................................................................................... 14–1
15
Debug Support ........................................................................................................... 15–1
15.1 Instruction Breakpoint ..................................................................................... 15–1
15.2 Data Breakpoint .............................................................................................. 15–1
16
Boundary-Scan Test Interface .................................................................................. 16–1
16.1 Overview ......................................................................................................... 16–1
16.2 Reset............................................................................................................... 16–2
16.3 Pull-Up Resistors ............................................................................................ 16–2
16.4 Instruction Register ......................................................................................... 16–2
16.5 Public Instructions ........................................................................................... 16–2
16.5.1 EXTEST (00000) ......................................................................................... 16–3
16.5.2 SAMPLE/PRELOAD (00001) ...................................................................... 16–3
16.5.3 CLAMP (00100) ........................................................................................... 16–3
16.5.4 HIGHZ (00101) ............................................................................................ 16–4
16.5.5 IDCODE (00110) ......................................................................................... 16–4
16.5.6 BYPASS (11111)......................................................................................... 16–4
16.6 Test Data Registers ........................................................................................ 16–5
16.6.1 Bypass Register .......................................................................................... 16–5
16.6.2 Intel® StrongARM SA-1110 Device Identification (ID)
Code Register.............................................................................................. 16–6
16.6.3 Intel® StrongARM SA-1110 Boundary-Scan (BS) Register ........................ 16–6
16.7 Boundary-Scan Interface Signals.................................................................... 16–7
A
Register Summary ...................................................................................................... A–1
B
3.6864–MHz Oscillator Specifications....................................................................... B–1
B.1 Specifications ....................................................................................................B–1
B.1.1 System Specifications ...................................................................................B–1
B.1.1.1 Parasitic Capacitance Off-chip Between PXTAL
and PEXTAL .........................................................................................B–2
B.1.1.2 Parasitic Capacitance Off-chip Between PXTAL
xiv
SA-1110 Developer’s Manual