SA1110 Datasheet, PDF (228/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
0h B010 0004
LCSR: LCD Status Register
Read/Write and Read-Only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
(Sheet 2 of 2)
Bits
3
4
5
6
7
8
9
10
11
31..12
Name
ABC
IOL
IUL
IOU
IUU
OOL
OUL
OOU
OUU
—
Description
AC bias count status.
0 – AC bias transition counter has not decremented to zero, or API is programmed to all
zeros.
1 – AC bias transition counter has decremented to zero, indicating that the L_BIAS pin has
transitioned the number of times specified by the API control bit field. Counter is reloaded
with the value in API but is disabled until the user clears ABC.
Input FIFO overrun lower panel status.
0 – Input FIFO for the lower panel display has not overrun.
1 – DMA attempted to place data into the input FIFO for the lower panel after it has been
filled.
Input FIFO underrun lower panel status.
0 – Input FIFO for the lower panel display has not underrun.
1 – DMA not supplying data to input FIFO for the lower panel at a sufficient rate. FIFO has
completely emptied; pixel unpacking logic has attempted to take added data from the FIFO.
Input FIFO overrun upper panel status.
0 - Input FIFO for the upper or whole panel display has not overrun.
1 - DMA attempted to place data into the input FIFO for the upper or whole panel after it
has been filled.
Input FIFO underrun upper panel status.
0 – Input FIFO for the upper or whole panel display has not underrun.
1 – DMA not supplying data to input FIFO for the upper or whole panel at a sufficient rate.
FIFO has completely emptied; pixel unpacking logic has attempted to take added data from
the FIFO.
Output FIFO overrun lower panel status.
0 – Output FIFO for the lower panel display has not overrun.
1 – Dither logic attempted to place data into the output FIFO for the lower panel after it had
been filled.
Output FIFO underrun lower panel status.
0 – Output FIFO for the lower panel display has not underrun.
1 – LCD dither logic not supplying data to output FIFO for the lower panel at a sufficient
rate. FIFO has completely emptied and data pin driver logic has attempted to take added
data from the FIFO.
Output FIFO overrun upper panel status.
0 – Output FIFO for the upper or whole panel display has not overrun.
1 – Dither logic attempted to place data into the output FIFO for the upper or whole panel
after it had been filled.
Output FIFO underrun upper panel status.
0 – Output FIFO for the upper or whole panel display has not underrun.
1 – LCD dither logic not supplying data to output FIFO for the upper or whole panel at a
sufficient rate. FIFO has completely emptied and data pin driver logic has attempted to take
added data from the FIFO.
Reserved.
11-48
SA-1110 Developer’s Manual