SA1110 Datasheet, PDF (229/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
11.7.12 LCD Controller Register Locations
Table 11-9 shows the registers associated with the LCD controller and the physical addresses used
to access them.
Figure 11-32 to Figure 11-36 describe the LCD controller timing parameters.
Table 11-9.
LCD Controller Control, DMA, and Status Register Locations
Address
Name
0hB010 0000
0hB010 0004
0hB010 0008 – 0h B010 000C
0hB010 0010
0hB010 0014
0hB010 0018
0hB010 001C
0hB010 0020
0hB010 0024
0hB010 0028
0hB010 002C – 0hB010 FFFF
LCCR0
LCSR
—
DBAR1
DCAR1
DBAR2
DCAR2
LCCR1
LCCR2
LCCR3
—
Description
LCD controller control register 0
LCD controller status register 1
Reserved
DMA channel 1 base address register
DMA channel 1 current address register
DMA channel 2 base address register
DMA channel 2 current address register
LCD controller control register 1
LCD controller control register 2
LCD controller control register 3
Reserved
SA-1110 Developer’s Manual
11-49