SA1110 Datasheet, PDF (28/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Functional Description
• System Control Module
The system control module (SCM) is also connected to the peripheral bus. It contains five blocks
used for general system functions:
– A real-time clock (RTC) clocked from an independent 32.768 kHz oscillator
– An operating system timer (OST) for general system timer functions as well as a watchdog mode
– Twenty-eight general-purpose I/Os (GPIO)
– An interrupt controller
– A power-management controller that handles the transitions in and out of sleep and idle modes
– A reset controller that handles the various reset sources on the processor
Figure 2-1 shows the functional blocks contained in the SA-1110 integrated processor. Figure 2-2
is a functional diagram of the SA-1110.
Figure 2-1. SA-1110 Block Diagram
3.686
MHz
32.768
KHz
OSC
OSC
PLL1
PLL2
RTC
OS Timer
General-
Purpose I/O
Interrupt
Controller
Power
Management
Reset
Controller
IMMU
DMMU
Instructions
Icache
PC
(16 Kbytes)
Dcache
(8 Kbytes)
Minicache
Addr
ARM^*
SA-1
Core
Load/Store Data
Intel^®
StrongARM^*
SA-1110
Microprocessor
JTAG
and
Misc
Test
Write
Buffer
Read
Buffer
LCD
Controller
System Bus
Bridge
DMA
Controller
Memory and
PCMCIA
Control Module
Peripheral Bus
Serial
Channel 0
UDC
Serial
Channel 1
GPCLK/UART
Serial
Channel 2
IrDA
Serial
Channel 3
UART
Serial
Channel 4
CODEC
* Other brands and names are the property of their respective owners.
A6608-01
2-2
SA-1110 Developer’s Manual