SA1110 Datasheet, PDF (372/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Package and Pinout
Table 14-2. SA-1110 Pinout – Alphabetic Signal Pin List
BGA
Pad
Signal
Type
Pin
BGA
Pad
Signal
Type
Pin
BGA
Pad
Signal
Type Pin
BGA
Pad
Signal
Type Pin
A1 VSSX
4 E1 D 17 I/O 13 J1 D 13
I/O 34 N1 SDCKE 0 O 52
A2 SCLK_C
O
224 E2 D 9
I/O 12 J2 D 20
I/O 31 N2 SDCKE 1 O 50
A3 PWR_EN
O
222 E3 D 24 I/O 10 J3 D 28
I/O 32 N3 SDCLK 1 O 51
A4 BATT_FAULT I
218 E4 D 0
I/O 7 J4 D 5
I/O 33 N4 VDDX2
A5 TDI
I
215 E5 VSSX
48 J5 VDDX2
116 N5 VDDX2
A6 TCK_BYP
I
211 E6 VDDX1
97 J6 D 12
I/O 30 N6 GP 15
I/O 73
A7 VDD
206 E7 VDDX1
107 J7 VSSX
N7 VDDX1
A8 PEXTAL
O
202 E8 VDDX1
178 J8 VSSX
N8 GP 7
I/O 83
A9 VSS
199 E9 VDDX1
188 J9 VSSX
N9 VDDX1
A10 TXD_3
I/O 196 E10 VDDX1
198 J10 VSSX
N10 GP 3
I/O 91
A11 TXD_1
I/O 192 E11 VDDX1
220 J11 VSSX
N11 VDDX1
A12 UDC-
I/O 189 E12 VDDX2
3 J12 VDDX2
128 N12 LDD0
I/O 99
A13 A 3
O
183 E13 A 14 O
166 J13 RD_nWR
O 143 N13 nIOIS16 I
120
A14 A 6
O
180 E14 A 17 O
163 J14 nCAS 0
O 142 N14 nPREG O 122
A15 A 7
O
179 E15 A 19 O
161 J15 nCAS 1
O 141 N15 nPCE2 O 123
A16 A 8
O
176 E16 A 21 O
157 J16 VDD
140 N16 nPWAIT I
121
B1 RXD_C
I/O 1 F1 D 10 I/O 18 K1 D 6
I/O 39 P1 SDCLK 0 O 53
B2 VSSX
16 F2 D 2
I/O 17 K2 D 21
I/O 35 P2 VSS
56
B3 SFRM_C
O
223 F3 D 25 I/O 14 K3 D 29
I/O 36 P3 VDD
55
B4 nTRST
I
217 F4 D 1
I/O 11 K4 D 14
I/O 40 P4 GP 24
I/O 62
B5 TDO
O
216 F5 VDDX2
K5 VDDX2
138 P5 GP 18
I/O 70
B6 TESTCLK
I
212 F6 VSSX
58 K6 VSSX
P6 GP 14
I/O 74
B7 NRESET
I
207 F7 VSSX
66 K7 VSSX
P7 GP 10
I/O 80
B8 PXTAL
I
203 F8 VSSX
76 K8 VSSX
P8 GP 8
I/O 82
B9 TXTAL
I
200 F9 VSSX
86 K9 VSSX
P9 GP 5
I/O 89
B10 RXD_2
I/O 193 F10 VSSX
98 K10 VDDX1
P10 GP 1
I/O 93
B11 RXD_1
I/O 191 F11 VSSX
108 K11 VDDX1
P11 L_PCLK I/O 96
B12 A 2
O
184 F12 VDDX2
15 K12 VDDX2
150 P12 LDD3
I/O 102
B13 A 5
O
181 F13 A 23 O
155 K13 nCAS 3
O 135 P13 LDD7
I/O 106
B14 A 10
O
174 F14 A 20 O
158 K14 VSS
139 P14 VSS
117
B15 A 9
O
175 F15 A 22 O
156 K15 nCAS 2
O 136 P15 VDD
118
B16 A 12
O
172 F16 A 25 O
153 K16 nRAS 0
O 134 P16 PSKTSEL O 119
C1 VDD
5 G1 D 19 I/O 23 L1 D 7
I/O 43 R1 GP 27
I/O 59
C2 TXD_C
I/O 2 G2 D 3
I/O 21 L2 D 30
I/O 42 R2 GP 25
I/O 61
C3 VSSX
28 G3 D 26 I/O 20 L3 D 22
I/O 41 R3 GP 22
I/O 64
C4 VDD_FAULT I
221 G4 D 18 I/O 19 L4 D 15
I/O 44 R4 GP 20
I/O 68
C5 TCK
I
214 G5 VDDX2
27 L5 VDDX2
160 R5 GP 17
I/O 71
C6 TMS
I
213 G6 VSSX
115 L6 VSSX
R6 GP 13
I/O 77
C7 nRESET_OUT O
208 G7 VSSX
127 L7 VSSX
R7 GP 12
I/O 78
C8 VDDP
204 G8 VSSX
137 L8 VSSX
R8 GP 6
I/O 84
C9 TEXTAL
O
201 G9 VSSX
149 L9 VSSX
R9 VSS
88
C10 RXD_3
I/O 195 G10 VSSX
159 L10 VDDX1
R10 GP 2
I/O 92
C11 UDC+
I/O 190 G11 VSSX
169 L11 VDDX1
R11 L_BIAS I/O 95
C12 A 1
O
185 G12 VDDX2
37 L12 VDDX2
170 R12 LDD2
I/O 101
C13 A 4
O
182 G13 A 24 O
154 L13 nRAS 1
O 133 R13 LDD5
I/O 104
C14 A 11
O
173 G14 nCS 0 O
152 L14 nRAS 2
O 132 R14 L_LCLK I/O 109
C15 VDD
168 G15 nCS 1 O
151 L15 nRAS 3
O 131 R15 nPOE
O 111
C16 A 15
O
165 G16 nCS 2 O
148 L16 nSDCAS
O 130 R16 nPIOW O 114
D1 D 16
I/O 9 H1 D 4
I/O 29 M1 D 31
I/O 46 T1 GP 26
I/O 60
D2 D 8
I/O 8 H2 VSS
26 M2 D 23
I/O 45 T2 GP 23
I/O 63
D3 VSS
6 H3 VDD
25 M3 SDCLK 2
O 49 T3 GP 21
I/O 67
D4 VSSX
38 H4 D 27 I/O
24 M4 SMROM_EN I
54 T4 GP 19
I/O 69
D5 VDDX1
65 H5 VDDX2
47 M5 VDDX2
T5 GP 16
I/O 72
D6 ROMSEL
I
210 H6 D 11 I/O 22 M6 VDDX1
T6 GP 11
I/O 79
D7 VDDX3
209 H7 VSSX
177 M7 VDDX1
T7 GP 9
I/O 81
D8 VSS
205 H8 VSSX
187 M8 VDDX1
T8 VDD
87
D9 VDDX1
75 H9 VSSX
197 M9 VDDX1
T9 GP 4
I/O 90
D10 TXD_2
I/O 194 H10 VSSX
219 M10 VDDX1
T10 GP 0
I/O 94
D11 VDDX1
85 H11 VSSX
M11 VDDX1
T11 LDD1
I/O 100
D12 A 0
O
186 H12 VDDX2
57 M12 VDDX2
T12 LDD4
I/O 103
D13 A 13
O
171 H13 RDY I
144 M13 nWE
O 125 T13 LDD6
I/O 105
D14 VSS
167 H14 nCS 3 O
147 M14 nSDRAS
O 129 T14 L_FCLK I/O 110
D15 A 16
O
164 H15 nCS 4 O
146 M15 nOE
O 126 T15 nPWE
O
112
D16 A 18
O
162 H16 nCS 5 O
145 M16 nPCE1
O 124 T16 nPIOR O 113
Note: All VDDX1, VDDX2, and VDDX3 pins should be connected directly to the VDDX power plane
of the system board. VDDP should be connected directly to the VDD plane of the system board.
14-4
SA-1110 Developer’s Manual