SA1110 Datasheet, PDF (153/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Memory and PCMCIA Control Module
Figure 10-10. SDRAM 8-Beat Read/Write Timing for 4 Bank x 4 M x 4 Bit Organization (64 Mbit)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
CPU Clock
Memory
Clock
Trcd
TDL
TDL+TRP+2
TRP+TWR+1
TRP+1
SDCLK
SDCKE
command
ACT
nRAS/nSDCS
READ
WRIT
READAP
WRITEAP
READ
ACT
WRIT
nSDRAS
nSDCAS
DRA13-12
Bank
Bank
DRA11
Row
Row
DRA10 _Row
Row
DRA9-0 Row Col Col Col Col Col Col Col Col
Row Col
Col C
nCAS/DQM
nWE
(READ)
RD/nWR
(READ)
D (READ)
D0 D1 D2 D3 D4 D5 D6 D7
D
nWE (WRIT)
RD/nWR
(WRIT)
D (WRIT)
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D
Contents of DRAM register fields:
last
time
first
MDCNFG:DTIM0=1 MDCNFG:DWID0=0 MDCAS00=0101 0101 0101 0101 0101 0101 0101 1111(binary)
MDCNFG:DRAC0=5 MDCNFG:CDB20=0 MDCNFG:TRP0=2 MDCNGF:TDL0=2 MDCNFG:TWR0=3
A6637-02
SA-1110 Developer’s Manual
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