SA1110 Datasheet, PDF (281/406 Pages) Intel Corporation – Intel StrongARM SA-1110 Microprocessor

Peripheral Control Module
The following table shows the bit locations corresponding to the data field, end-of-frame bit as well
as the cyclic redundancy check and receiver overrun error bits within the HSSP data register. Note
that both FIFOs are cleared when the SA-1110 is reset, the transmit FIFO is cleared when TXE=0,
and the receive FIFO is cleared when RXE=0.
0h 8004 006C
HSDR
Read/Write
10
9
8
7
6
5
4
3
2
1
0
ROR CRE
EOF
Bottom of Receive FIFO Data
Reset 0
0
0
0
0
0
0
0
0
0
0
Read Access
Note: ROR, CRE, EOF are not read, but rather are transferred to corresponding status bits in the HSSP status
register 1 (HSSR1) each time a new data value is transferred to HSDR.
7
6
5
4
3
2
1
0
Top of Transmit FIFO Data
Reset
0
0
0
0
0
0
0
0
Write Access
Bits
Name
Description
Top/bottom of transmit/receive FIFO data.
7..0
DATA _{Read – Bottom of receive FIFO.}
Write –Top of transmit FIFO.
End of frame.
0 – The last byte of the frame has not been encountered.
8
EOF
1 – The data value at the bottom of the receive FIFO represents the last byte of the frame.
Note: Each time an 11-bit value reaches the bottom of the receive FIFO, bit 8 from the last
FIFO entry is transferred to the EOF bit in HSSR1.
CRC error.
0 – CRC not encountered yet, or the CRC value calculated on the incoming data matched
the received CRC value.
9
CRE
1 – The CRC value calculated on the incoming data did not match the received CRC value.
Note: Each time an 11-bit value reaches the bottom of the receive FIFO, bit 9 from the last
FIFO entry is transferred to the CRE bit in HSSR1.
Receiver overrun.
0 – No receiver overrun has been detected.
10
ROR
1 – Receive logic attempted to place data into receive FIFO while it was full; one or more
data values after the data value at the bottom of the receive FIFO were lost.
Note: Each time an 11-bit value reaches the bottom of the receive FIFO, bit 10 from the
last FIFO entry is transferred to the ROR bit in HSSR1.
SA-1110 Developer’s Manual
11-101