MEC1322 Datasheet, PDF (81/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
FIGURE 5-2:
CLKRUN# SYSTEM IMPLEMENTATION EXAMPLE
Master
Target
EC Device
LCLK
CLKRUN#
FIGURE 5-3:
CLOCK START ILLUSTRATION
PCI CLOCK
GENERATOR
(Central Resource)
SERIRQ MODE BIT
ANY CHANGE
CLKRUN#
LCLK
CLKRUN#
DRIVEN BY
EC Device
EC Device STOPS DRIVING
CLKRUN# (after two rising
edges of LCLK)
2 CLKS MIN.
Note 1: The signal “ANY CHANGE” is the same as “CHANGE/ASSERTION” in Table 5-9.
2: The LPC Controller must continually monitor the state of CLKRUN# to maintain LCLK until an active “any
IRQ change” condition has been transferred to the host in a Serial IRQ cycle or “any DRQ assertion” con-
dition has been transferred to the host in a DMA cycle. For example, if “any IRQ change or DRQ assertion”
is asserted before CLKRUN# is de-asserted (not shown in Figure 5-3), the controller must assert CLKRUN#
as needed until the Serial IRQ cycle or DMA cycle has completed.
5.8.2 CLAIMING AND FORWARDING TRANSACTIONS FOR SUPPORTED LPC CYCLES
The following sections define how the LPC Controller determines if a cycle is targeted for one of the chip’s logical
devices and how that transaction is then forwarded to that logical device. The following sections include:
• Section 5.8.2.1, "I/O Transactions," on page 81
• Section 5.8.2.2, "Device Memory Transactions," on page 82
5.8.2.1 I/O Transactions
The system host will generate I/O commands to communicate with I/O peripherals, such as Keyboard Controller, UART,
etc. The LPC Controller claims only I/O transactions targeted to it and it ignores all others. The following sections
describe how I/O transactions are claimed and forwarded to access the Runtime and Configuration registers.
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DS00001719D-page 81