MEC1322 Datasheet, PDF (225/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
The Base Address indicates where the first register can be accessed in a particular address space for a block instance.
TABLE 17-6: RUNTIME REGISTER SUMMARY
Offset
Register Name
00h
Timer Count Register
04h
Timer Preload Register
08h
Timer Status Register
0Ch
Timer Int Enable Register
10h
Timer Control Register
17.9.1 TIMER COUNT REGISTER
Offset ^00h
Bits
Description
Type
31:0 COUNTER
R/W
This is the value of the Timer counter. This is updated by Hardware
but may be set by Firmware. If it is set while the Hardware Timer is
operating, functionality can not be maintained. When read, it is buff-
ered so single byte reads will be able to catch the full 4 byte register
without it changing.
Default
0h
Reset
Event
Tim-
er_Reset
17.9.2
The size of the Counter is indicated by the instance name. Bits 0 to
(size-1) are r/w counter bits. Bits 31 down to size are reserved.
Reads return 0 and writes have no effect.
TIMER PRELOAD REGISTER
Offset ^04h
Bits
Description
31:0 PRE_LOAD
This is the value of the Timer pre-load for the counter. This is used
by H/W when the counter is to be restarted automatically; this will
become the new value of the counter upon restart.
Type
R/W
Default
0h
Reset
Event
Tim-
er_Reset
17.9.3
The size of the Pre-Load value is the same as the size of the
counter. The size of the Counter is indicated by the instance name.
Bits 0 to (size-1) are r/w pre-load bits. Bits 31 down to size are
reserved. Reads return 0 and writes have no effect.
TIMER STATUS REGISTER
Offset ^08h
Bits
Description
Type
31:0 Reserved
0 EVENT_INTERRUPT
This is the interrupt status that fires when the timer reaches its limit.
This may be level or a self clearing signal cycle pulse, based on the
AUTO_RESTART bit in the Timer Control Register. If the timer is set
to automatically restart, it will provide a pulse, otherwise a level is
provided.
R
R/WC
Default
-
0h
Reset
Event
-
Tim-
er_Reset
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DS00001719D-page 225