MEC1322 Datasheet, PDF (379/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
TABLE 35-4: RUNTIME REGISTER SUMMARY
Offset
Register Name
04h
MCHP Reserved
08h
MCHP Reserved
0Ch
MCHP Reserved
10h
MCHP Reserved
14h
AHB Error Control
18h
Interrupt Control
1Ch
ETM TRACE Enable
20h
JTAG Enable
24h
MCHP Reserved
28h
WDT Event Count
2Ch
MCHP Reserved
30h
MCHP Reserved
34h
MCHP Reserved
38h
ADC VREF PD
3Ch
MCHP Reserved
40h
MCHP Reserved
35.8.1 AHB ERROR CONTROL
Offset ^14h
Bits
Description
7:1 Reserved
0 AHB_ERROR_DISABLE
0: EC memory exceptions are enabled.
1: EC memory exceptions are disabled.
35.8.2 INTERRUPT CONTROL
Type
R
RW
Offset ^18h
Bits
31:1 Reserved
0 NVIC_EN
Description
Type
R
R/W
This bit enables Alternate NVIC IRQ’s Vectors. The Alternate NVIC
Vectors provides each interrupt event with a dedicated (direct) NVIC
vector.
0 = Alternate NVIC vectors disabled
1= Alternate NVIC vectors enabled
Default
-
0h
Reset
Event
-
VCC1_R
ESET
Default
-
1b
Reset
Event
-
VCC1_R
ESET
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DS00001719D-page 379