MEC1322 Datasheet, PDF (281/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
24.11.1 TACHX CONTROL REGISTER
Offset ^00h
Bits
Description
31:16 TACHX_COUNTER
This 16-bit field contains the latched value of the internal Tach pulse
counter, which may be configured by the Tach Reading Mode Select
field to operate as a free-running counter or to be gated by the Tach
input signal.
Type
R
If the counter is free-running (Mode 0), the internal Tach counter
increments (if enabled) on transitions of the raw Tach input signal
and is latched into this field every time it is incremented. The act of
reading this field will not reset the counter, which rolls over to 0000h
after FFFFh. The firmware will compute the delta between the current
count reading and the previous count reading, to determine the num-
ber of pulses detected over a programmed period.
If the counter is gated by the Tach input and clocked by 100kHz_Clk
(Mode 1), the internal counter will be latched into the reading register
when the programmed number of edges is detected or when the
counter reaches FFFFh. The internal counter is reset to zero after it
is copied into this register.
Note:
In Mode 1, a counter value of FFFFh means that the Tach
did not detect the programmed number of edges in
655ms. A stuck fan can be detected by setting the TACHx
High Limit Register to a number less than FFFFh. If the
internal counter then reaches FFFFh, the reading register
will be set to FFFFh and an out-of-limit interrupt can be
sent to the EC.
15 TACH_INPUT_INT_EN
R/W
1=Enable Tach Input toggle interrupt from Tach block
0=Disable Tach Input toggle interrupt from Tach block
14 COUNT_READY_INT_EN
R/W
1=Enable Count Ready interrupt from Tach block
0=Disable Count Ready interrupt from Tach block
13 Reserved
R
12:11 TACH_EDGES
R/W
A Tach signal is a square wave with a 50% duty cycle. Typically, two
Tach periods represents one revolution of the fan. A Tach period con-
sists of three Tach edges.
This programmed value represents the number of Tach edges that
will be used to determine the interval for which the number of
100kHz_Clk pulses will be counted
11b=9 Tach edges (4 Tach periods)
10b=5 Tach edges (2 Tach periods)
01b=3 Tach edges (1 Tach period)
00b=2 Tach edges (1/2 Tach period)
Default
00h
Reset
Event
VCC1_
RESET
0b
VCC1_
RESET
0b
VCC1_
RESET
-
-
00b
VCC1_
RESET
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DS00001719D-page 281