MEC1322 Datasheet, PDF (168/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
TABLE 12-10: EC-ONLY REGISTER SUMMARY (CONTINUED)
EC Offset
Host I/O Index
(MBX_INDEX)
Register Name (Mnemonic)
34h
ADh
Mailbox register [24]
AEh
Mailbox register [25]
AFh
Mailbox register [26]
B0h
Mailbox register [27]
38h
B1h
Mailbox register [28]
B2h
Mailbox register [29]
B3h
Mailbox register [2A]
Note: The Mailbox Index Addresses 9Ah, 9Ch and 9Eh are not used in Table 12-10. These addresses are
Reserved.
12.12.1 HOST-TO-EC MAILBOX REGISTER
Offset ^0h
MBX_ ^82h
INDEX
Bits
Description
Type
7:0 HOST_EC_MBOX
If enabled, an interrupt to the EC marked by the MBX_DATA bit in
the Interrupt Aggregator will be generated whenever the Host writes
this register.
This register is cleared when written with FFh.
Host
Access
Port:
R/W
EC:
R/WC
Default
0h
Reset
Event
VCC1_R
ESET
12.12.2 EC-TO-HOST MAILBOX REGISTER
Offset ^4h
MBX_ ^83h
INDEX
Bits
Description
7:0 EC_HOST_MBOX
An EC write to this register will set bit EC_WR in the SMI Interrupt
Source Register to ‘1b’. If enabled, this will’ generate a Host SMI.
This register is cleared when written with FFh.
Type
Host
Access
Port:
R/WC
EC:
R/W
Default
0h
Reset
Event
VCC1_R
ESET
DS00001719D-page 168
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