MEC1322 Datasheet, PDF (300/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
Offset ^03h
Bits
7 MCHP Reserved
Description
Type
R/W
6 EN_RRC
R/W
Enables the ramp rate control circuitry during the Manual Mode of
operation.
• ‘0’ (default) - The ramp rate control circuitry for the Manual
Mode of operation is disabled. When the Fan Drive Setting val-
ues are changed and the RPM based Fan Control Algorithm is
disabled, the fan driver will be set to the new setting immedi-
ately.
• ‘1’ - The ramp rate control circuitry for the Manual Mode of oper-
ation is enabled. The PWM setting will follow the ramp rate con-
trols as determined by the Fan Step and Update Time settings.
The maximum PWM step is capped at the Fan Step setting and
is updated based on the Update Time as given by Table 26-11,
"Update Time".
5 DIS_GLITCH
R/W
Disables the low pass glitch filter that removes high frequency noise
injected on the TACH pin.
• ‘0’ (default) - The glitch filter is enabled.
• ‘1’ - The glitch filter is disabled.
4:3 DER_OPT[1:0]
R/W
Control some of the advanced options that affect the derivative por-
tion of the RPM based fan control algorithm as shown in Table 26-
12, "Derivative Options". These bits only apply if the Fan Speed
Control Algorithm is used.
2:1 ERR_RNG[1:0]
R/W
Control some of the advanced options that affect the error window.
When the measured fan speed is within the programmed error win-
dow around the target speed, the fan drive setting is not updated.
These bits only apply if the Fan Speed Control Algorithm is used.
See Table 26-13, "Error Range Options".
0 POLARITY
R/W
Determines the polarity of the PWM driver. This does NOT affect the
drive setting registers. A setting of 0% drive will still correspond to
0% drive independent of the polarity.
• ‘0’ (default) - the Polarity of the PWM driver is normal. A drive
setting of 00h will cause the output to be set at 0% duty cycle
and a drive setting of FFh will cause the output to be set at
100% duty cycle.
• ‘1’ - The Polarity of the PWM driver is inverted. A drive setting of
00h will cause the output to be set at 100% duty cycle and a
drive setting of FFh will cause the output to be set at 0% duty
cycle.
Default
0b
0b
Reset
Event
VCC1_R
ESET
VCC1_R
ESET
0b
VCC1_R
ESET
11b
VCC1_R
ESET
01b
VCC1_R
ESET
0b
VCC1_R
ESET
DS00001719D-page 300
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