MEC1322 Datasheet, PDF (60/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
Offset ^14h
Bits
Description
14 ACPI EC 1 Clock Required
0: block does NOT need clocks.
1: block requires clocks.
13 ACPI EC 0 Clock Required
0: block does NOT need clocks.
1: block requires clocks.
12 GLBL_CFG Clock Required
0: block does NOT need clocks.
1: block requires clocks.
11:2 RESERVED
1 UART 0 Clock Required
0: block does NOT need clocks.
1: block requires clocks.
0 LPC Clock Required
0: block does NOT need clocks.
1: block requires clocks.
Type
R
R
R
RES
R
R
Default
0h
Reset
Event
VCC1_R
ESET
0h
VCC1_R
ESET
-
VCC1_R
ESET
-
VCC1_R
ESET
-
VCC1_R
ESET
3.9.7 SYSTEM SLEEP CONTROL REGISTER (SYS_SLP_CNTRL)
Offset ^18h
Bits
Description
31:3 RESERVED
2 Core regulator standby
0: keep regulator fully operational when sleeping.
1: standby the regulator when sleeping. Allows enough power for
chip static operation for memory retention.
1 Ring oscillator output gate
0: keep ROSC ungated when sleeping.
1: gate the ROSC output when sleeping.
0 Ring oscillator power down
0: keep ROSC operating when sleeping.
1: disable ROSC when sleeping. Clocks will start on wakeup, but
there is a clock lock latency penalty.
Type
RES
R/W
R/W
R/W
Default
Reset
Event
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
The System Sleep States shown in Table 3-10 and determined by the bits in this register, are only entered if all blocks
are sleeping; that is, if the sleep enable bits are set for all blocks and no clocks are required.
DS00001719D-page 60
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