MEC1322 Datasheet, PDF (120/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
9.9.1 HOST-TO-EC MAILBOX REGISTER
Offset ^00h
Bits
Description
7:0 HOST_EC_MBOX
8-bit mailbox used communicate information from the system host to
the embedded controller. Writing this register generates an event to
notify the embedded controller.
Type
R/W
The embedded controller has the option of clearing some or all of the
bits in this register. This is dependent on the protocol layer imple-
mented using the EMI Mailbox. The host must know this protocol to
determine the meaning of the value that will be reported on a read.
9.9.2
This bit field is aliased to the HOST_EC_MBOX bit field in the
HOST-to-EC Mailbox Register
EC-TO-HOST MAILBOX REGISTER
Offset ^01h
Bits
Description
Type
7:0 EC_HOST_MBOX
8-bit mailbox used communicate information from the embedded
controller to the system host. Writing this register generates an event
to notify the system host.
R/WC
The system host has the option of clearing some or all of the bits in
this register. This is dependent on the protocol layer implemented
using the EMI Mailbox. The embedded controller must know this pro-
tocol to determine the meaning of the value that will be reported on a
read.
9.9.3
This bit field is aliased to the EC_HOST_MBOX bit field in the EC-to-
HOST Mailbox Register
EC ADDRESS LSB REGISTER
Offset ^02h
Bits
Description
7:2 EC_ADDRESS_LSB
This field defines bits[7:2] of EC_Address [15:0]. Bits[1:0] of the
EC_Address are always forced to 00b.
Type
R/W
The EC_Address is aligned on a DWord boundary. It is the address
of the memory being accessed by EC Data Byte 0 Register, which is
an offset from the programmed base address of the selected
REGION.
Default
0h
Reset
Event
VCC1_R
ESET
Default
0h
Reset
Event
VCC1_R
ESET
Default
0h
Reset
Event
VCC1_R
ESET
DS00001719D-page 120
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