MEC1322 Datasheet, PDF (49/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
The following circuit is recommended to fulfill this requirement:
FIGURE 3-1:
RECOMMENDED BATTERY CIRCUIT
To EC as
VCC1
3.3V nom,
from AC Source
or Battery Pack
(Schottky Diode)
“RTC” Rail (PCH, System)
VCC0
to EC
3.3V max with
VCC1 = 0V,
3.6V max with
VCC1 = VBAT
(Schottky
Diode)
()
Possible
+
Current Limiter
(1K typ.)
3.0V nom
Coin Cell
3.4.2 VOLTAGE REFERENCES
Table 3-2 lists the External Voltage References to which the MEC1322 provides high impedance interfaces.
TABLE 3-2: VOLTAGE REFERENCE DEFINITIONS
Power Well
Nominal Input
Voltage
Scaling Ratio
Nominal
Monitored
Voltage
Description
Source
VREF_PECI
Variable
n/a
Variable
Processor Voltage
Pin Interface
(Note 3-2)
External Voltage Reference
Used to scale Processor
Interface signals
Note 3-2 The VREF_PECI does not have a power good signal associated with it. See VREF Buffer type
definition in Table 37-4, “DC Electrical Characteristics,” on page 391.
3.4.3 POWER GOOD SIGNALS
The power good timing and thresholds are defined in the Section 38.1, "Voltage Thresholds and Power Good Timing,"
on page 397.
TABLE 3-3: POWER GOOD SIGNAL DEFINITIONS
Power Good
Signal
Description
Source
VCC1GD
PWRGD
VCC1GD is an internal power good signal used
to indicate when the VCC1 rail is on and stable.
PWRGD is used to indicate when the main
power rail voltage is on and stable.
VCC1GD is asserted following a delay after the
VCC1 power well exceeds its preset voltage
threshold. VCC1GD is de-asserted
as soon as this voltage drops below this thresh-
old.
VCC_PWRGD Input pin
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DS00001719D-page 49