MEC1322 Datasheet, PDF (296/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
FIGURE 26-4:
INTERRUPT FLOW
Interrupt
Status Bit 1
Interrupt Event 1
.
. ^Interrupt
Enable Bit 1
..
.
.
.
.
Interrupt
.
Status Bit n
Interrupt Event n
..
Interrupt Signal
Interrupt
Enable Bit n
26.9 Fan Control Register Bank
The registers listed in the Table 26-8, "Fan Control Register Summary" are for a single instance of the RPM-PWM Inter-
face block. The addresses of each register listed in this table are defined as a relative offset to the host “Base Address”
defined in Table 26-7, "Fan Control Register Bank Base Address Table".
TABLE 26-7: FAN CONTROL REGISTER BANK BASE ADDRESS TABLE
Instance Name
Instance
Number
Host
Address Space
Base Address (Note 26-1)
RPM-PWM Inter-
0
EC
32-bit internal
4000_A000h
face
address space
Note 26-1 The Base Address indicates where the first register can be accessed in a particular address space
for a block instance.
TABLE 26-8: FAN CONTROL REGISTER SUMMARY
Register Name
Offset
Fan Setting
00h
PWM Divide
01h
Fan Configuration 1
02h
Fan Configuration 2
03h
MCHP Reserved
04h
Gain
05h
Fan Spin Up Configuration
06h
Fan Step
07h
Fan Minimum Drive
08h
Valid Tach Count
09h
Fan Drive Fail Band Low Byte
0Ah
Fan Drive Fail Band High Byte
0Bh
Tach Target Low Byte
0Ch
Tach Target High Byte
0Dh
Tach Reading Low Byte
0Eh
DS00001719D-page 296
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