MEC1322 Datasheet, PDF (283/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
24.11.2 TACHX STATUS REGISTER
Offset ^04h
Bits
Description
Type
31:4 Reserved
3 COUNT_READY_STATUS
This status bit is asserted when the Tach input changes state and
when the counter value is latched. This bit remains cleared to '0'
when the TACH_READING_MODE_SELECT bit in the TACHx Con-
trol Register is '0'.
When the TACH_READING_MODE_SELECT bit in the TACHx Con-
trol Register is set to '1', this bit is set to ‘1’ when the counter value is
latched by the hardware. It is cleared when written with a ‘1’. If
COUNT_READY_INT_EN in the TACHx Control Register is set to 1,
this status bit will assert the Tach Interrupt signal.
R
R/WC
Default
-
0b
Reset
Event
-
VCC1_R
ESET
1=Reading ready
0=Reading not ready
2 TOGGLE_STATUS
This bit is set when Tach Input changes state. It is cleared when writ-
ten with a ’1’. If TACH_INPUT_INT_EN in the TACHx Control Regis-
ter is set to ’1’, this status bit will assert the Tach Interrupt signal.
R/WC
0b
VCC1_R
ESET
1=Tach Input changed state (this bit is set on a low-to-high or high-to-
low transition)
0=Tach stable
1 TACH_PIN_STATUS
R
This bit reflects the state of Tach Input. This bit is a read only bit that
may be polled by the embedded controller.
0b
VCC1_R
ESET
1= Tach Input is high
0= Tach Input is low
0 TACH_OUT_OF_LIMIT_STATUS
This bit is set when the Tach Count value is greater than the high
limit or less than the low limit. It is cleared when written with a ’1’. To
disable this status event set the limits to their extreme values. If
TACH_OUT_OF_LIMIT_ENABLE in the TACHx Control Register is
set to 1’, this status bit will assert the Tach Interrupt signal.
R/WC
0b
VCC1_R
ESET
1=Tach is outside of limits
0=Tach is within limits
Note 1: Some fans offer a Locked Rotor output pin that generates a level event if a locked rotor is detected. This bit
may be used in combination with the Tach pin status bit to detect a locked rotor signal event from a fan.
2: Tach Input may come up as active for Locked Rotor events. This would not cause an interrupt event because
the pin would not toggle. Firmware must read the status events as part of the initialization process, if polling
is not implemented.
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DS00001719D-page 283