MEC1322 Datasheet, PDF (374/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
33.11.4 ADC SINGLE REGISTER
The ADC Single Register is used to control which ADC channel is captured during a Single-Sample conversion cycle
initiated by the Start_Single bit in the ADC Control Register.
APPLICATION NOTE: Do not change the bits in this register in the middle of a conversion cycle to insure proper
operation.
Offset ^0Ch
Bits
Description
31:5 RESERVED
4:0 Single_En[4:0]
0: single cycle conversions for this channel are disabled
1: single cycle conversions for this channel are enabled
Each bit in this field enables the corresponding ADC channel when a
single cycle of conversions is started when the Start_Single bit in the
ADC Control Register is written with a 1.
Type
RES
R/W
Default
Reset
Event
00h
VCC1_R
ESET
33.11.5 ADC REPEAT REGISTER
The ADC Repeat Register is used to control which ADC channels are captured during a repeat conversion cycle initiated
by the Start_Repeat bit in the ADC Control Register.
Offset
Bits
31:5
4:0
10h
Description
RESERVED
Rpt_En[4:0]
0: repeat conversions for this channel are disabled
1: repeat conversions for this channel are enabled
Each bit in this field enables the corresponding ADC channel for
each pass of the Repeated ADC Conversion that is controlled by bit
Start_Repeat in the ADC Control Register.
Type
RES
R/W
Default
Reset
Event
00h
VCC1_R
ESET
33.11.6 ADC CHANNEL READING REGISTERS
All 5 ADC channels return their results into a 32-bit reading register. In each case the low 10 bits of the reading register
return the result of the Analog to Digital conversion and the upper 22 bits return 0. Table 33-7, “Analog to Digital Con-
verter Register Summary,” on page 371 shows the addresses of all the reading registers.
Note: The ADC Channel Reading Registers access require single 16, or 32 bit reads; i.e., two 8 bit reads cannot
ensure data coherency.
Offset ^{See Table 33-7, "Analog to Digital Converter Register Summary"}
Bits
Description
31:10 RESERVED
9:0 ADCx_[9:0]
This read-only field reports the 10-bit output reading of the Input
ADCx.
Type
RES
R/W
Default
Reset
Event
000h
VCC1_R
ESET
DS00001719D-page 374
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