MEC1322 Datasheet, PDF (259/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
21.4 Interface
This block is designed to be accessed externally via the pin interface and internally via a registered host interface.
FIGURE 21-1:
INTERNAL DMA CONTROLLER I/O DIAGRAM
Host Interface
DMA Interface
Power, Clocks and Reset
Interrupts
Internal DMA Controller
21.4.1 SIGNAL DESCRIPTION
This block doesn’t have any external signals that may be routed to the pin interface. This DMA Controller is intended to
be used internally to transfer large amounts of data without the embedded controller being actively involved in the trans-
fer.
21.4.2 HOST INTERFACE
The registers defined for the Internal DMA Controller are accessible by the various hosts as indicated in Section 21.9,
"EC-Only Registers".
21.4.3 DMA INTERFACE
Each DMA Master Device that may engage in a DMA transfer must have a compliant DMA interface. The following table
lists the DMA Devices in the MEC1322.
TABLE 21-2: DMA CONTROLLER DEVICE SELECTION
Device Name
Device Number
(Note 21-1)
Controller Source
SMBus 0 Controller
0
Slave
1
Master
SMBus 1 Controller
2
Slave
3
Master
SMBus 2 Controller
4
Slave
5
Master
SMBus 3 Controller
6
Slave
7
Master
SPI 0 Controller
8
Transmit
9
Receive
SPI 1 Controller
10
Transmit
Note 21-1
11
Receive
The Device Number is programmed into field HARDWARE_FLOW_CONTROL_DEVICE of the DMA
Channel N Control register.
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DS00001719D-page 259