MEC1322 Datasheet, PDF (302/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
TABLE 26-14: GAIN DECODE
GAIND or GAINP or GAINI [1:0]
1
0
0
0
0
1
1
0
1
1
Respective Gain Factor
1x
2x
4x (default)
8x
26.9.6 FAN SPIN UP CONFIGURATION REGISTER
The Fan Spin Up Configuration Register controls the settings of Spin Up Routine.
Offset ^06h
Bits
Description
7:6 DRIVE_FAIL_CNT[1:0]
Determines how many update cycles are used for the Drive Fail
detection function as shown in Table 26-15, "DRIVE_FAIL_CNT[1:0]
Bit Decode". This circuitry determines whether the fan can be driven
to the desired Tach target. These settings only apply if the Fan
Speed Control Algorithm is enabled.
5 NOKICK
Determines if the Spin Up Routine will drive the fan to 100% duty
cycle for 1/4 of the programmed spin up time before driving it at the
programmed level.
• ‘0’ (default) - The Spin Up Routine will drive the PWM to 100%
for 1/4 of the programmed spin up time before reverting to the
programmed spin level.
• ‘1’ - The Spin Up Routine will not drive the PWM to 100%. It will
set the drive at the programmed spin level for the entire duration
of the programmed spin up time.
4:2 SPIN_LVL[2:0]
SPIN_LVL[2:0] - Determines the final drive level that is used by the
Spin Up Routine as shown in Table 26-16, "Spin Level".
1:0 SPINUP_TIME[1:0]
Determines the maximum Spin Time that the Spin Up Routine will
run for. If a valid tachometer measurement is not detected before the
Spin Time has elapsed, an interrupt will be generated. When the
RPM based Fan Control Algorithm is active, the fan driver will
attempt to re-start the fan immediately after the end of the last spin
up attempt.
The Spin Time is set as shown in Table 26-17, "Spin time".
Type
R/W
R/W
R/W
R/W
Default
00b
Reset
Event
VCC1_R
ESET
0b
VCC1_R
ESET
110b
01b
VCC1_R
ESET
VCC1_R
ESET
TABLE 26-15: DRIVE_FAIL_CNT[1:0] BIT DECODE
DRIVE_FAIL_CNT[1:0]
1
0
Number of Update Periods
0
0
Disabled - the Drive Fail detection circuitry is disabled
0
1
16 - the Drive Fail detection circuitry will count for 16 update periods
DS00001719D-page 302
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