MEC1322 Datasheet, PDF (420/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
FIGURE 38-29: SPI INTERFACE TIMING, FULL DUPLEX MODE (TCLKPH = 0, RCLKPH = 1)
SPCLK (CLKPOL = 0)
SPCLK (CLKPOL = 1)
SPDOUT
(TCLKPH = 0)
SPDIN
(RCLKPH = 1)
CS (GPIO)
FIRST DATA BIT SAMPLED BY
MASTER
FIRST DATA BIT SAMPLED BY
SLAVE
LAST DATA BIT SAMPLED BY
SLAVE
LAST DATA BIT SAMPLED BY
MASTER
In this mode, the data from slave is available immediately when the slave device is selected. The slave device requires
an initial SPCLK edge before data is available. The data is sampled on the second and following even SPCLK edges
by the master. The data is sampled on the first and following odd edges by the slave.
FIGURE 38-30: SPI INTERFACE TIMING - FULL DUPLEX MODE (TCLKPH = 1, RCLKPH = 1)
SPCLK (CLKPOL = 0)
SPCLK (CLKPOL = 1)
SPDOUT
(TCLKPH = 1)
SPDIN
(RCLKPH = 1)
CS (GPIO)
FIRST DATA BIT SAMPLED BY
MASTER AND SLAVE
LAST DATA BIT SAMPLED BY
MASTER AND SLAVE
In this mode, the master and slave require an initial SPCLK edge before data is available. Data is sampled on the second
and following even SPCLK edges by the master and slave.
DS00001719D-page 420
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