MEC1322 Datasheet, PDF (206/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
TABLE 15-11: BIT DEFINITIONS FOR GIRQ8 SOURCE, ENABLE, AND RESULT REGISTERS
Bit
Block Instance
Name
Source Name
Wake
Source Description
[15:8] GPIO[157:150]
GPIO_Event
Y Bits[8:15] are controlled by the GPIO_Events gener-
ated by GPIO150 through GPIO157, respectively.
[21:16] GPIO[165:160]
GPIO_Event
The GPIO Interface can generate an interrupt source
event on a high level, low level, rising edge and fall-
ing edge, as configured by the Interrupt Detection
(int_det) bits in the Pin Control Register associated
with the GPIO signal function.
Y Bits[16:21] are controlled by the GPIO_Events gen-
erated by GPIO160 through GPIO165, respectively.
[30:22]
31
Reserved
n/a
Reserved
n/a
The GPIO Interface can generate an interrupt source
event on a high level, low level, rising edge and fall-
ing edge, as configured by the Interrupt Detection
(int_det) bits in the Pin Control Register associated
with the GPIO signal function.
N Reserved
N See Table 15-7, "GIRQx Source Register", Table 15-
8, "GIRQx Enable Set Register", Table 15-10,
"GIRQx Enable Clear Register", and Table 15-9,
"GIRQx Result Register" for a definition of this bit for
the Source, Enable, and Result registers.
15.9.2 GIRQ9
TABLE 15-12: BIT DEFINITIONS FOR GIRQ9 SOURCE, ENABLE, AND RESULT REGISTERS
Bit
Block Instance
Name
Source Name Wake
Source Description
[7:0]
GPIO[107:100]
GPIO_Event
Y Bits[0:7] are controlled by the GPIO_Events generated
by GPIO100 through GPIO107, respectively.
[15:8]
GPIO[117:110]
GPIO_Event
The GPIO Interface can generate an interrupt source
event on a high level, low level, rising edge and falling
edge, as configured by the Interrupt Detection (int_det)
bits in the Pin Control Register associated with the
GPIO signal function.
Y Bits[8:15] are controlled by the GPIO_Events gener-
ated by GPIO110 through GPIO117, respectively.
[23:16] GPIO[127:120]
GPIO_Event
The GPIO Interface can generate an interrupt source
event on a high level, low level, rising edge and falling
edge, as configured by the Interrupt Detection (int_det)
bits in the Pin Control Register associated with the
GPIO signal function.
Y Bits[16:23] are controlled by the GPIO_Events gener-
ated by GPIO120 through GPIO127, respectively.
The GPIO Interface can generate an interrupt source
event on a high level, low level, rising edge and falling
edge, as configured by the Interrupt Detection (int_det)
bits in the Pin Control Register associated with the
GPIO signal function.
DS00001719D-page 206
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