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MEC1322 Datasheet, PDF (69/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC
MEC1322
Offset 40h
Bits
Description
3 RESERVED
2 TACH0 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
1 PECI Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
0 INT Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
Type
RES
R/W
R/W
R/W
Default
Reset
Event
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
Note: If a block is configured such that it is to be reset when it goes to sleep, then registers within the block may
not be writable when the block is asleep.
3.9.17 EC RESET ENABLE 2 REGISTER (EC_RST_EN2)
Offset 44h
Bits
31:29 RESERVED
28 MCHP Reserved
Description
27 MCHP Reserved
26 MCHP Reserved
25 LED3 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
24 TIMER32_1 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
23 TIMER32_0 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
22 TIMER16_3 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
21 TIMER16_2_Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
20 SPI1 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
Type
RES
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
Reset
Event
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
 2014 - 2015 Microchip Technology Inc.
DS00001719D-page 69