MEC1322 Datasheet, PDF (364/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
32.0 TRACE FIFO DEBUG PORT (TFDP)
32.1 Introduction
The TFDP serially transmits Embedded Controller (EC)-originated diagnostic vectors to an external debug trace system.
32.2 References
No references have been cited for this chapter.
32.3 Terminology
There is no terminology defined for this chapter.
32.4 Interface
This block is designed to be accessed externally via the pin interface and internally via a registered host interface.
FIGURE 32-1:
I/O DIAGRAM OF BLOCK
Host Interface
Trace FIFO Debug Port
(TFDP)
Power, Clocks and Reset
Signal Description
Interrupts
32.5 Signal Description
The Signal Description Table lists the signals that are typically routed to the pin interface.
TABLE 32-1: SIGNAL DESCRIPTION TABLE
Name
Direction
Description
TFDP Clk
TFDP Data
Output
Output
Derived from EC Bus Clock.
Serialized data shifted out by TFDP Clk.
32.6 Host Interface
The registers defined for the Trace FIFO Debug Port (TFDP) are accessible by the various hosts as indicated in Section
32.11, "EC-Only Registers".
DS00001719D-page 364
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