MEC1322 Datasheet, PDF (211/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
TABLE 15-18: BIT DEFINITIONS FOR GIRQ15 SOURCE, ENABLE, AND RESULT REGISTERS
Bit
Block Instance
Name
Source Name
Wake
Source Description
16
[30:17]
31
MBX_DATA
Reserved
n/a
MBX_DATA
Reserved
n/a
N Interrupt generated for Host writes to Mailbox Data Regis-
ter
N Reserved
N See Table 15-7, "GIRQx Source Register", Table 15-8,
"GIRQx Enable Set Register", Table 15-10, "GIRQx
Enable Clear Register", and Table 15-9, "GIRQx Result
Register" for a definition of this bit for the Source, Enable,
and Result registers.
15.9.9 GIRQ16
TABLE 15-19: BIT DEFINITIONS FOR GIRQ16 SOURCE, ENABLE, AND RESULT REGISTERS
Bit
Block Instance
Name
Source Name
Wake
Source Description
[2:0]
3
[30:4]
31
Reserved
PECIHOST
Reserved
n/a
Reserved
PECIHOST
Reserved
n/a
N Reserved
N PECI Host
N Reserved
N See Table 15-7, "GIRQx Source Register", Table 15-8,
"GIRQx Enable Set Register", Table 15-10, "GIRQx
Enable Clear Register", and Table 15-9, "GIRQx Result
Register" for a definition of this bit for the Source, Enable,
and Result registers.
15.9.10 GIRQ17
TABLE 15-20: BIT DEFINITIONS FOR GIRQ17 SOURCE, ENABLE, AND RESULT REGISTERS
Bit
Block Instance
Name
Source Name
Wake
Source Description
0
IRQ_TACH0
TACH
1
IRQ_TACH1
TACH
2
PS2_0_WK
PS2_DAT0 pin
3
PS2_1_WK
PS2_DAT1 pin
4
PS2_2_WK
PS2_DAT2 pin
5
PS2_3_WK
PS2_DAT3 pin
6
BC_INT_N_WK
BC_LINK
[9:7]
Reserved
Reserved
10
ADC_SNGL ADC_Single_Int
11
ADC_RPT
ADC_Repeat_Int
12 MCHP Reserved MCHP Reserved
N This internal signal is generated from the OR’d result of
the status events, as defined in the TACHx Status Regis-
ter..
N This internal signal is generated from the OR’d result of
the status events, as defined in the TACHx Status Regis-
ter.
Y PS2_0 Start Detect from pin signal PS2_DAT0 (see
Note 15-2 on page 215).
Y PS2_1 Start Detect from pin signal PS2_DAT1 (see
Note 15-2 on page 215).
Y PS2_2 Start Detect from pin signal PS2_DAT2 (see
Note 15-2 on page 215).
Y PS2_3 Start Detect from pin signal PS2_DAT3 (see
Note 15-2 on page 215).
Y Interrupt from the BC_LINK Companion BC_INT# pin
(see Note 15-2 on page 215).
N Reserved
N Interrupt signal from ADC controller to EC for Single-
Sample ADC conversion
N Interrupt signal from ADC controller to EC for Repeated
ADC conversion
N MCHP Reserved
 2014 - 2015 Microchip Technology Inc.
DS00001719D-page 211