MEC1322 Datasheet, PDF (279/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
24.7 Power, Clocks and Reset
This section defines the Power, Clock, and Reset parameters of the block.
24.7.1 POWER DOMAINS
VCC1
Name
24.7.2 CLOCK INPUTS
Description
The logic and registers implemented in this block are powered by this
power well.
100kHz_Clk
Name
24.7.3 RESETS
Description
This is the clock input to the tachometer monitor logic. In Mode 1, the
TACH is measured in the number of these clocks.
Name
VCC1_RESET
Description
This signal resets all the registers and logic in this block to their default
state.
24.8 Interrupts
This section defines the Interrupt Sources generated from this block.
Source
TACH
Description
This internal signal is generated from the OR’d result of the status
events, as defined in the TACHx Status Register.
24.9 Low Power Modes
The TACH may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry.
24.10 Description
The TACH block monitors Tach output signals or locked rotor signals generated by various types of fans. These signals
can be used to determine the speed of the attached fan. This block is designed to monitor fans at fan speeds from 100
RPMs to 30,000 RPMs.
Typically, these are DC brushless fans that generate (with each revolution) a 50% duty cycle, two-period square wave,
as shown in Figure 24-2 below.
FIGURE 24-2:
FAN GENERATED 50%DUTY CYCLE WAVEFORM
one revolution
In typical systems, the fans are powered by the main power supply. Firmware may disable this block when it detects that
the main power rail has been turned off by either clearing the <enable> TACH_ENABLE bit or putting the block to sleep
via the supported Low Power Mode interface (see Low Power Modes).
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DS00001719D-page 279