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| MEC1322 Datasheet, PDF (67/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC | |||
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MEC1322
3.9.14 CHIP RESET ENABLE REGISTER (CHIP_RST_EN)
Offset 38h
Bits
31:2 RESERVED
1 MCHP Reserved
Description
0 MCHP Reserved
Type
RES
R
R/W
Default
Reset
Event
0h
VCC1_R
ESET
0h
VCC1_R
ESET
Note: If a block is configured such that it is to be reset when it goes to sleep, then registers within the block may
not be writable when the block is asleep.
3.9.15 HOST RESET ENABLE REGISTER (HOST_RST_EN)
Offset 3Ch
Bits
Description
31:19 RESERVED
18 RTC Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
17 RESERVED
16 8042EM Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
15 ACPI PM1 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
14 ACPI EC 1 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
13 ACPI EC 0 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
12 GLBL_CFG Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
11:2 RESERVED
1 UART 0 Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
0 LPC Reset Enable
0: block will not be reset on sleep.
1: block will be reset on sleep.
Type
RES
R/W
RES
R/W
R/W
R/W
R/W
R/W
RES
R/W
R/W
Default
Reset
Event
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
0h
VCC1_R
ESET
Note: If a block is configured such that it is to be reset when it goes to sleep, then registers within the block may
not be writable when the block is asleep.
ï£ 2014 - 2015 Microchip Technology Inc.
DS00001719D-page 67
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