MEC1322 Datasheet, PDF (313/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
DMA controller then reads the received byte from the GP-SPI’s SPI RX Data Register (SPIRD) and stores it in the DMA
receive buffer. With AUTO_READ set, this read clears both the RxBF and TxBE. Clearing TxBE causes (dummy) data
from the SPI TX Data Register (SPITD) to be transferred to the internal shift register, mimicking the effect of the afore-
mentioned write to the SPI TX Data Register (SPITD) by the driver. SPI clock is toggled again to shift in the second read
byte. This process continues until the end of the DMA buffer is reached - the DMA controller stops responding to an
active Tx Empty until the buffer’s address registers are reprogrammed.
27.10.3 TYPES OF SPI TRANSACTIONS
The GP-SPI controller can be configured to operate in three modes: Full Duplex, Half Duplex, and Dual Mode.
27.10.3.1 Full Duplex
In Full Duplex Mode, serial data is transmitted and received simultaneously by the SPI master over the SPDOUT and
SPDIN pins. To enable Full Duplex Mode clear SPDIN Select.
When a transaction is completed in the full-duplex mode, the RX_DATA shift register always contains received data
(valid or not) from the last transaction.
27.10.3.2 Half Duplex
In Half Duplex Mode, serial data is transmitted and received sequentially over a single data line (referred to as the SPD-
OUT pin). To enable Half Duplex Mode set SPDIN Select to 01b. The direction of the SPDOUT signal is determined by
the BIOEN bit.
• To transmit data in half duplex mode set the BIOEN bit before writing the TX_DATA register.
• To receive data in half duplex mode clear the BIOEN bit before writing the TX_DATA register with a dummy byte.
Note: The Software driver must properly drive the BIOEN bit and store received data depending on the transac-
tion format of the specific slave device.
27.10.3.3 Dual Mode of Operation
In Dual Mode, serial data is transmitted sequentially from the SPDOUT pin and received in by the SPI master from the
SPDOUT and SPDIN pins. This essentially doubles the received data rate and is often available in SPI Flash devices.
To enable Dual Mode of operation the SPI core must be configured to receive data in path on the SPDIN1 and SPDIN2
inputs via SPDIN Select. The BIOEN bit determines if the SPI core is transmitting or receiving. The setting of this bit
determines the direction of the SPDOUT signal. The SPDIN Select bits are configuration bits that remain static for the
duration of a dual read command. The BIOEN bit must be toggled to indicate when the SPI core is transmitting and
receiving.
• To transmit data in dual mode set the BIOEN bit before writing the TX_DATA register.
• To receive data in dual mode clear the BIOEN bit before writing the TX_DATA register with a dummy byte. The
even bits (0,2,4,and 6) are received on the SPDOUT pin and the odd bits (1,3,5,and 7) are received on the SPDIN
pin. The hardware assembles these received bits into a single byte and loads them into the RX_DATA register
accordingly.
The following diagram illustrates a Dual Fast Read Command that is supported by some SPI Flash devices.
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DS00001719D-page 313