MEC1322 Datasheet, PDF (50/456 Pages) Microchip Technology – Keyboard and Embedded Controller for Notebook PC

MEC1322
3.4.4 SYSTEM POWER SEQUENCING
The following table defines the behavior of the Power Sources in each of the defined ACPI power states.
TABLE 3-4: TYPICAL POWER SUPPLIES VS. ACPI POWER STATES
Supply
Name
S0
(FULL
ON)
S1
(POS)
ACPI Power State
S3
(STR)
S4
(STD)
S5
G3
(Soft Off) (MECH Off)
Description
VCC1
ON
ON
ON
ON
ON
OFF MEC1322 “Always-on”
Supply. (Note 3-3)
VBAT (VCC0) ON
ON
ON
ON
ON
ON
MEC1322 Battery Back-up
(Note 3-4) (Note 3-4) (Note 3-4) Supply
Note 3-3 VCC1 power supply is always on while the battery pack or ac power is applied to the system.
Note 3-4
This device requires that the VBAT power is on when the VCC1 power supply is on. External circuitry,
a diode isolation circuit, is implemented on the motherboard to extend the battery life. This external
circuitry ensures the VBAT pin will derive power from the VCC1 power well when it is on. Therefore,
the VBAT supply will never appear to be off when the VCC1 rail is on. See APPLICATION NOTE: on
page 48.
3.5 Clocks
The following section defines the MEC1322 clocks that are generated or referenced.
TABLE 3-5: CLOCK DEFINITIONS
Clock Name
Frequency
Description
Source
SUSCLK
32.768 kHz Crystal
Oscillator
48 MHz Ring
Oscillator
24MHz_Clk
16MHz_Clk
1.8432MHz_Clk
100kHz_Clk
32KHz_Clk
32.768 KHz
32.768 KHz
48MHz
24 MHz
16MHz
1.843 MHz
100 kHz
32.768 KHz
32.768 kHz Suspend Well Clock
Source is a single-ended input that is
an accurate 32.768KHz clock.
(Note 3-5)
Pin Interface (XTAL2)
A 32.768 KHz parallel resonant crys- Pin Interface (XTAL1 and XTAL2)
tal connected between the XTAL1
and XTAL2 pins.
The 48 MHz Ring Oscillator is a high- Enabled by VCC1 Power (Note 3-6).
accuracy, low power, low start-up
May be stopped by Chip Power Man-
latency 48 MHz Ring Oscillator.
agement Features.
Derived clock for UART
48 MHz Ring Oscillator
Derived clock for SMBus Controller 48 MHz Ring Oscillator
Derived clock for UART
48 MHz Ring Oscillator
Derived for several blocks in the EC 48 MHz Ring Oscillator
Subsystem, including, but not limited
to, PWM, TACH.
Internal 32kHz clock domain
Pin Interface:
XTAL2: 32KHz Crystal input/ single-
ended clock source input pin.
XTAL1: 32KHz Crystal output
The XOSEL bit configures the source
of this clock domain as either a sin-
gle-ended 32.768 KHz clock input
(SUSCLK) or the 32.768 kHz Crystal
Oscillator (Note 3-7). If neither of
these is available, this clock domain
is derived from the 48 MHz Ring
Oscillator.
DS00001719D-page 50
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