Z85233 Datasheet, PDF (92/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

Reg
WR4
WR3
WR5
WR6
WR7
WR10
WR3
WR5
WR0
SCC™/ESCC™ User’s Manual
Data Communication Modes
Table 4-8. Initializing the Receiver in Character-Oriented Mode
Bit Number
D7 D6 D5 D4 D3 D2 D1 D0 Description
4
0 0 0 x 0 0 0 0 Select x1 clock, enable sync mode, & no parity
x=0 for 8-bit sync, x=1 for 16-bit sync
r
x
0
1
1
0
0
0 rx=# of Rx bits/char, No auto enable, enter Hunt,
Enable Rx CRC, No sync character load inhibit
d
t
x
000
r
1 d=inverse state of DTR pin, tx=# of Tx bits/char,
use CRC-16, r=inverse state of /RTS pin, CRC enable
x x x x x x x x sync character, lower byte
x x x x x x x x sync character, upper byte
c
0
00
i
00
s c=CRC preset, NRZ data, i=idle line condition
s=size of sync character
r
x
0
1
1
0
0
1 Enable Receiver
d
t
x
010
r
1 Enable Transmitter
1 0 0 0 0 0 0 0 Reset CRC generator
4.3.3 Transmitter/Receiver Synchronization
The SCC contains a transmitter-to-receiver synchronization
function that is used to guarantee that the character
boundaries for the received and transmitted data are the
same. In this mode, the receiver is in Hunt and the
transmitter is idle, sending either all 1s or all 0s. When the
receiver recognizes a sync character, it leaves Hunt mode;
one character time later the transmitter is enabled and
begins sending sync characters. Beyond this point the
receiver and transmitter are again completely independent,
except that the character boundaries are now aligned
(Figure 4-10).
Direction of Message Flow
RxD
Sync
Sync
Sync
TxD
Sync
Receiver Leaves Hunt
Figure 4-10. Transmitter to Receiver Synchronization
There are several restrictions on the use of this feature in
the SCC. First, it only works with 6-bit, 8-bit or 16-bit sync
characters. The data character length for both the receiver
and the transmitter must be six bits with 6-bit sync charac-
ter, and eight bits with an 8-bit or 16-bit sync character. Of
course, the receive and transmit clocks must have the
same rate as well as the proper phase relationship.
A specific sequence of operations must be followed to syn-
chronize the transmitter to the receiver. Both the receiver
and transmitter must have been initialized for operation in
Synchronous mode sometime in the past, although this ini-
tialization need not be redone each time the transmitter is
synchronized to the receiver. The transmitter is disabled
by setting bit D3 of WR5 to 0. At this point the transmitter
will send continuous 1s. If it is required that continuous
UM010901-0601
4-17