Z85233 Datasheet, PDF (158/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

Application Note
Interfacing Z80^® CPUs to the Z8500 Peripheral Family
A SIMPLE Z80-Z8500 SYSTEM
The Z8500 devices interface easily to the Z80 CPU, thus CPU. The Z80 should not be set for mode 2 interrupts
6 ^{providing a system of considerable flexibility. Figure 16 since the CIO will never place a vector onto the data bus.}
illustrates a simple system using the Z80A CPU and Z8536 Instead, the CPU should be placed into mode 1 interrupt
Counter/Timer and Parallel I/O Unit (CIO) in a mode 1 or mode and a global interrupt service routine can poll the
non-interrupt environment. Since interrupt vectors are not CIO to determine what caused the interrupt to occur. In this
used, the /INTACK line is tied High and no additional logic system, the software emulation procedure described
is needed. Because the CIO can be used in a polled above is effective.
interrupt environment, the /INT pin is connected to the
Figure 16. Z80 to Z8500 Simple System Mode 1 Interrupt or Non-Interrupt Structure
Additional Information in Zilog Publications:
The Z80 Family User’s Manual includes technical
information on the Z80 CPU, DMA, PIO, CTC, and SIO.
Technical information on the Z80 CPU AC Characteristics
and the Z80 Family Interrupt Structure Tutorial can be
found in the Z80 Databook.
The Z8000 User’s Manual features technical information
on the Z8536 CIO and Z8038 FIO.
UM010901-0601
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