Z85233 Datasheet, PDF (15/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

SCC™/ESCC™ User’s Manual
General Description
1.4 PIN DESCRIPTIONS
The SCC pins are divided into seven functional groups: The timing and control groups designate the type of trans-
1 ^{Address/Data, Bus Timing and Reset, Device Control, In- action to occur and when it will occur. The interrupt group}
terrupt, Serial Data (both channels), Peripheral Control provides inputs and outputs to conform to the Z-Bus^®
(both channels), and Clocks (both channels). Figures 1-2 specifications for handling and prioritizing interrupts. The
and 1-3 show the pins in each functional group for both remaining groups are divided into channel A and channel
Z80X30 and Z85X30. Notice the pin functions unique to B groups for serial data (transmit or receive), peripheral
each bus interface version in the Address/Data group, Bus control (such as DMA or modem), and the input and output
Timing and Reset group, and Control groups.
lines for the receive and transmit clocks.
The Address/Data group consists of the bidirectional lines
used to transfer data between the CPU and the SCC (Ad-
dresses in the Z80X30 are latched by /AS). The direction
of these lines depends on whether the operation is a Read
or Write.
The signal functionality and pin assignments (Figures 1-4
to 1-7) stay constant within the same bus interface group
(i.e., Z80X30, Z85X30), except for some timing and/or DC
specification differences. For details, please reference the
individual product specifications.
Data Bus
Bus Timing
and Reset
Control
Interrupt
D7
TxDA
D6
RxDA
D5
/TRxCA
D4
/RTxCA
D3
/SYNCA
D2
/W//REQA
D1
/DTR//REQA
D0
/RTSA
/RD
/CTSA
/WR Z85X30 ^/DCDA
A//B
TxDB
/CE
RxDB
D//C
/TRxCB
/INT
/RTxCB
/INTACK
/SYNCB
IEI
/W//REQB
IEO
/DTR//REQB
/RTSB
/CTSB
/DCDB
Figure 1-2. Z85X30 Pin Functions
Serial
Data
Channel
Clocks
Channel
Controls
for Modem,
DMA and
Other
Serial
Data
Channel
Clocks
Channel
Controls
for Modem,
DMA and
Other
UM010901-0601
1-5