Z85233 Datasheet, PDF (260/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

Application Note
Boost Your System Performance Using The Zilog ESCC^™
SDLC Frame Status FIFO enhancement is enabled by and high data rate communications. The reason is the
setting WR15 D2. If it is enabled when EOF is detected, ERROR RESET command is necessary to unlock the
1 ^{byte count and status from the Status FIFO are loaded into FIFO. Data from the next frame may be lost if ERROR}
RR6, RR7 and RR1. This is used in DMA-driven systems. RESET fails to issue early.
Historically, EOF is treated as a special condition. Special
condition interrupts are triggered if any one of the below ^{This drawback is improved in the ESCC for a DMA driven}
interrupts is enabled:
system. By enabling interrupts on “Special Receive
Conditions only” and SDLC status FIFO, EOF is treated
1. Receive Interrupt on First Character or Special
differently from other special conditions. When EOF status
Condition.
reached the exit location of the FIFO:
2. Interrupt on All Receive Characters or Special
Conditions.
1. A “Receive Data Available” interrupt is generated to
signal that EOF has been reached.
3. Special Receive Condition Only.
2. Receive Data FIFO is not locked.
If 1 or 3 (above) is enabled, the data FIFO is locked after
the interrupt is serviced by reading RR1 in the Status
FIFO, as shown in Figure 11. This is commonly used in a
DMA-driven system to avoid delivering useless
information (e.g., EOF) to the data buffer. Locking the data
FIFO is not desirable in systems with long interrupt latency
Because of these changes, the data from the next frame is
securely loaded and the system processes the EOF
interrupt. The only responsibility of the software is issuing
the Reset Highest IUS before resuming normal operation
(Figure 12).
Data n,N EOF Data 1,N+1
Packet N
Packet N+1
Data 1,N+1
EOF
Data n,N
Data Flow Into
ESCC Receive
Data FIFO
Status
FIFO
Y
Enabled?
n
Increment
FIFO Pointer
Byte Count
of Packet N
Packet 10
Set
FIFO Data
Available
Set FIFO
Overflow If
Required
Packet N
Status Is
Loaded
Packet 2
Packet 1
Byte Count
(RRT = RR6)
SDLC
Status
FIFO
Status
(RR1)
Figure 9. Status FIFO Operation at End Of Frame
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