Z85233 Datasheet, PDF (86/317 Pages) Zilog, Inc. – The Zilog SCC Serial Communication Controller

SCC™/ESCC™ User’s Manual
Data Communication Modes
Table 4-6. Sync Character Length Selection
provide a character synchronization signal on the /SYNC
Sync Length WR4,D5
6 bits
0
WR4,D4
0
WR10,D0
1
pin. This mode is selected by setting bits D5 and D4 of
4 ^{WR4 to 1. In this mode, the Sync/Hunt bit in RR0 reports}
the state of the /SYNC pin, but the receiver is still placed in
8 bits
0
0
0
Hunt mode when the external logic is searching for a sync
12 bits
0
1
1
character match. Two receive clock cycles after the last bit
16 bits
0
1
0
of the sync character is received, the receiver is in Hunt
mode and the /SYNC pin is driven Low, then character as-
The arrangement of the sync character in WR6 and WR7 ^{sembly begins on the rising edge of the receive clock. This}
is shown in Figure 4-5.
immediately precedes the activation of /SYNC (Figure 4-
6). The receiver leaves Hunt mode when /SYNC is driven
For those applications requiring any other sync character Low.
length, the SCC makes provision for an external circuit to
Write Register 6
D7 D6 D5 D4 D3 D2 D1 D0
Sync7
Sync1
Sync7
Sync3
ADR7
ADR7
Sync6
Sync0
Sync6
Sync2
ADR6
ADR6
Sync5
Sync5
Sync5
Sync1
ADR5
ADR5
Sync4
Sync4
Sync4
Sync0
ADR4
ADR4
Sync3 Sync2
Sync3 Sync2
Sync3 Sync2
1
1
ADR3 ADR2
x
x
Sync1 ^Sync0
Sync1 Sync0
Sync1 ^Sync0
1
1
ADR1 ^ADR0
x
x
Monosync, 8 Bits
Monosync, 6 Bits
Bisync, 16 Bits
Bisync, 12 Bits
SDLC
SDLC (Address Range)
Write Register 7
D7 D6 D5 D4 D3 D2 D1 D0
/RTxC
Sync7 Sync6 ^{Sync5 Sync4 Sync3 Sync2 Sync1 Sync0 Monosync, 8 Bits}
Sync5 Sync4 Sync3 Sync2 Sync1 Sync0 x
x Monosync, 6 Bits
Sync15 Sync14 ^{Sync13 Sync12 Sync11 Sync10 Sync9 Sync8 Bisync, 16 Bits}
Sync11 Sync10 ^{Sync9 Sync8 Sync7 Sync6 Sync5 Sync4 Bisync, 12 Bits}
0
1
1
1
1
1
1
0 SDLC
Figure 4-5. Sync Character Programming
RxD
SYNC Last-1
SYNC Last
Data 0
Data 1
Data 2
/SYNC
UM010901-0601
Figure 4-6. /SYNC as an Input
4-11